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Espressif Systems /ESP32-S3 /TWAI0 /STATUS

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Interpret as STATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RX_BUF_ST)RX_BUF_ST 0 (OVERRUN_ST)OVERRUN_ST 0 (TX_BUF_ST)TX_BUF_ST 0 (TX_COMPLETE)TX_COMPLETE 0 (RX_ST)RX_ST 0 (TX_ST)TX_ST 0 (ERR_ST)ERR_ST 0 (BUS_OFF_ST)BUS_OFF_ST 0 (MISS_ST)MISS_ST

Description

Status register

Fields

RX_BUF_ST

1: The data in the RX buffer is not empty, with at least one received data packet.
OVERRUN_ST

1: The RX FIFO is full and data overrun has occurred.
TX_BUF_ST

1: The TX buffer is empty, the CPU may write a message into it.
TX_COMPLETE

1: The TWAI controller has successfully received a packet from the bus.
RX_ST

1: The TWAI Controller is receiving a message from the bus.
TX_ST

1: The TWAI Controller is transmitting a message to the bus.
ERR_ST

1: At least one of the RX/TX error counter has reached or exceeded the value set in register TWAI_ERR_WARNING_LIMIT_REG.
BUS_OFF_ST

1: In bus-off status, the TWAI Controller is no longer involved in bus activities.
MISS_ST

This bit reflects whether the data packet in the RX FIFO is complete. 1: The current packet is missing; 0: The current packet is complete

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data